Artificial Intelligence Applications and Reconfigurable Architectures

  • 3h 8m
  • Anuradha D. Thakare, Sheetal Umesh Bhandari
  • John Wiley & Sons (US)
  • 2023

ARTIFICIAL INTELLIGENCE APPLICATIONS and RECONFIGURABLE ARCHITECTURES

The primary goal of this book is to present the design, implementation, and performance issues of AI applications and the suitability of the FPGA platform.

This book covers the features of modern Field Programmable Gate Arrays (FPGA) devices, design techniques, and successful implementations pertaining to AI applications. It describes various hardware options available for AI applications, key advantages of FPGAs, and contemporary FPGA ICs with software support. The focus is on exploiting parallelism offered by FPGA to meet heavy computation requirements of AI as complete hardware implementation or customized hardware accelerators. This is a comprehensive textbook on the subject covering a broad array of topics like technological platforms for the implementation of AI, capabilities of FPGA, suppliers’ software tools and hardware boards, and discussion of implementations done by researchers to encourage the AI community to use and experiment with FPGA.

Readers will benefit from reading this book because

  • It serves all levels of students and researcher’s as it deals with the basics and minute details of Ecosystem Development Requirements for Intelligent applications with reconfigurable architectures whereas current competitors’ books are more suitable for understanding only reconfigurable architectures.
  • It focuses on all aspects of machine learning accelerators for the design and development of intelligent applications and not on a single perspective such as only on reconfigurable architectures for IoT applications.
  • It is the best solution for researchers to understand how to design and develop various AI, deep learning, and machine learning applications on the FPGA platform.
  • It is the best solution for all types of learners to get complete knowledge of why reconfigurable architectures are important for implementing AI-ML applications with heavy computations.

Audience

Researchers, industrial experts, scientists, and postgraduate students who are working in the fields of computer engineering, electronics, and electrical engineering, especially those specializing in VLSI and embedded systems, FPGA, artificial intelligence, Internet of Things, and related multidisciplinary projects.

About the Author

Anuradha Thakare, PhD, is a Dean of International Relations and Professor in the Department of Computer Engineering at Pimpri Chinchwad College of Engineering, Pune, India. She has more than 22 years of experience in academics and research and has published more than 80 research articles in SCI journals as well several books.

Sheetal Bhandari, PhD, received her degree in the area of reconfigurable computing. She is a postgraduate in electronics engineering from the University of Pune with a specialization in digital systems. She is working as a professor in the Department of Electronics and Telecommunication Engineering and Dean of Academics at Pimpri Chinchwad College of Engineering. Her research area concerns reconfigurable computing and embedded system design around FPGA HW-SW Co-Design.

In this Book

  • Strategic Infrastructural Developments to Reinforce Reconfigurable Computing for Indigenous AI Applications
  • Review of Artificial Intelligence Applications and Architectures
  • An Organized Literature Review on Various Cubic Root Algorithmic Practices for Developing Efficient VLSI Computing System—Understanding Complexity
  • An Overview of the Hierarchical Temporal Memory Accelerators
  • NLP-Based AI-Powered Sanskrit Voice Bot
  • Automated Attendance Using Face Recognition
  • A Smart System for Obstacle Detection to Assist Visually Impaired in Navigating Autonomously Using Machine Learning Approach
  • Crop Disease Detection Accelerated by GPU
  • A Relative Study on Object and Lane Detection
  • FPGA-Based Automatic Speech Emotion Recognition Using Deep Learning Algorithm
  • Hardware Implementation of RNN Using FPGA
SHOW MORE
FREE ACCESS